RTL DESIGN ENGINEER

Dear Job Aspirants:

Leading Service-based MNC, Bangalore needs Verification Head/Director.

JOB DESCRIPTION

• Masters/ Bachelors in EE/EC/CS with 4-8 years of experience in RTL, SoC, ASIC Design.
• Experience in FPGA is Mandatory Qualifications.
• Masters/ Bachelors in EE/EC/CS.

Position – RTL/SOC/ASIC DESIGN ENGINEER

Salary – Best in the Industry with Benefits and RSUs

Qualification – BE/B.TECH/ME/M.TECH from recognized University